ICMC 2025 : The International Compact Modeling Conference
Call For Paper (CFP) Description
The Compact Model Coalition (CMC) brings academia and industry partners together in the development and standardization of compact models for semiconductor devices. For 30 years now, the CMC has been instrumental in creating standardized and verified models for designers to use in their increasingly complex circuits for SPICE simulation.
The CMC is organizing a new and innovative International Compact Modeling Conference. Cosponsored by IEEE EDS, it will focus uniquely on compact device models, their development and broad application in the semiconductor industry. You are invited to participate in the evolution of these models, guide model development to help circuit designers create the best circuit performance possible, and enable foundries to leverage the strength of their device fabrication to full extent. Join the world experts in design, process technology, and model development to discuss state of the art semiconductor device modeling for a two-day in-person event in one location, offering a great opportunity to present and learn about this core element of circuit design and how to get the most from these global collaborations.
We are seeking papers for oral or poster presentations in the following areas:
APPLICATION OF DEVICE MODELS
» Innovative application of CMC standard device models
» Best practices,novel use, and benefits of standard device models in circuit design
» Use of compact models to demonstrate foundry device capabilities
DEVICE MODEL DEVELOPMENT
» Modeling of physical phenomena: Statistical variation, reliability and aging, noise and fluctuations, high frequency effects, Electrostatic Discharge (ESD), self heating, layout effects, etc.
» Methodologies to assist in model development, practices for coding, quality assurance, circuit simulator integration, etc.
» Parameter extraction, measurement techniques, model calibration, validation, and verification methodologies, including so lutions based on AI or Machine Learning.
MODEL ENHANCEMENTS AND IMPLEMENTATIONS
» Model extensions to capture additional device features (leakage, noise, capacitance, second-order dependencies, …) or expand the operating range of existing devices (bias, power, temperature, frequency, etc.)
» Model enhancements to support the design of new or demanding circuits
» Model workflow, implementation, and integration into the design environment (PDK)
» Computing/simulation platforms, simulation algorithms, and methodologies to improve simulation performance (parallel processing, etc.)
» Models for established device types that currently lack standardization.
MODELING FOR FUTURE/EMERGING TECHNOLOGIES AND APPLICATIONS
» Models for emerging device types or architectures on the horizon, such as, ferroelectric devices, silicon photonics, cryogenic, quantum computing, etc.
» Modeling of new physical phenomena in support of current and novel device technologies
» Novel device technologies currently being researched that could further revolutionize circuit performance, have implications in the design flow, and may become mainstream in the future
Please submit your paper proposals in the form of a 2-page abstract for review by January 15, 2025 here 2025.si2-icmc.org. Acceptance notifications will be sent by March 10, 2025. Accepted contributions (for both oral and poster presentations) are expected to submit a camera-ready 4-page draft version of their papers by April 20, 2025 and final version by May 23, 2025 for publication in IEEE Xplore®.
Submit Now: https://2025.si2-icmc.org/authors/call-for-papers
The CMC is organizing a new and innovative International Compact Modeling Conference. Cosponsored by IEEE EDS, it will focus uniquely on compact device models, their development and broad application in the semiconductor industry. You are invited to participate in the evolution of these models, guide model development to help circuit designers create the best circuit performance possible, and enable foundries to leverage the strength of their device fabrication to full extent. Join the world experts in design, process technology, and model development to discuss state of the art semiconductor device modeling for a two-day in-person event in one location, offering a great opportunity to present and learn about this core element of circuit design and how to get the most from these global collaborations.
We are seeking papers for oral or poster presentations in the following areas:
APPLICATION OF DEVICE MODELS
» Innovative application of CMC standard device models
» Best practices,novel use, and benefits of standard device models in circuit design
» Use of compact models to demonstrate foundry device capabilities
DEVICE MODEL DEVELOPMENT
» Modeling of physical phenomena: Statistical variation, reliability and aging, noise and fluctuations, high frequency effects, Electrostatic Discharge (ESD), self heating, layout effects, etc.
» Methodologies to assist in model development, practices for coding, quality assurance, circuit simulator integration, etc.
» Parameter extraction, measurement techniques, model calibration, validation, and verification methodologies, including so lutions based on AI or Machine Learning.
MODEL ENHANCEMENTS AND IMPLEMENTATIONS
» Model extensions to capture additional device features (leakage, noise, capacitance, second-order dependencies, …) or expand the operating range of existing devices (bias, power, temperature, frequency, etc.)
» Model enhancements to support the design of new or demanding circuits
» Model workflow, implementation, and integration into the design environment (PDK)
» Computing/simulation platforms, simulation algorithms, and methodologies to improve simulation performance (parallel processing, etc.)
» Models for established device types that currently lack standardization.
MODELING FOR FUTURE/EMERGING TECHNOLOGIES AND APPLICATIONS
» Models for emerging device types or architectures on the horizon, such as, ferroelectric devices, silicon photonics, cryogenic, quantum computing, etc.
» Modeling of new physical phenomena in support of current and novel device technologies
» Novel device technologies currently being researched that could further revolutionize circuit performance, have implications in the design flow, and may become mainstream in the future
Please submit your paper proposals in the form of a 2-page abstract for review by January 15, 2025 here 2025.si2-icmc.org. Acceptance notifications will be sent by March 10, 2025. Accepted contributions (for both oral and poster presentations) are expected to submit a camera-ready 4-page draft version of their papers by April 20, 2025 and final version by May 23, 2025 for publication in IEEE Xplore®.
Submit Now: https://2025.si2-icmc.org/authors/call-for-papers
Conference Topics
Frequently Asked Questions
What is ICMC 2025 : The International Compact Modeling Conference?
ICMC 2025 : The International Compact Modeling Conference is Join the International Compact Modeling Conference (ICMC 2025) to discuss state-of-the-art semiconductor device modeling, device models, and their applications....
How do I submit my paper to ICMC 2025 : The International Compact Modeling Conference?
Submit your paper via the official submission portal at https://2025.si2-icmc.org/. Follow the submission guidelines outlined in the CFP.
How do I register for the ICMC 2025 : The International Compact Modeling Conference?
Register at https://2025.si2-icmc.org/. Early registration is recommended to secure your spot and avail discounts.
What are the important dates for ICMC 2025 : The International Compact Modeling Conference?
- Start Date: 26 Jun, 2025
- End Date: 27 Jun, 2025
- End Date: 27 Jun, 2025
What is the location and date of ICMC 2025 : The International Compact Modeling Conference?
ICMC 2025 : The International Compact Modeling Conference will be held on 26 Jun, 2025 - 27 Jun, 2025 at San Francisco, CA, USA. More details about the event location and travel arrangements can be found on the conference’s official website.
What is the location of ICMC 2025 : The International Compact Modeling Conference?
ICMC 2025 : The International Compact Modeling Conference will be held at San Francisco, CA, USA.
Can I submit more than one paper to ICMC 2025 : The International Compact Modeling Conference?
Yes, multiple submissions are allowed, provided they align with the conference’s themes and topics. Each submission will be reviewed independently.
What is the review process for submissions?
Papers will be reviewed by a panel of experts in the field, ensuring that only high-quality, relevant work is selected for presentation. Each paper will be evaluated on originality, significance, and clarity.
What presentation formats are available at ICMC 2025 : The International Compact Modeling Conference?
Presentations can be made in various formats including oral presentations, poster sessions, or virtual presentations. Specific details will be provided upon acceptance of your paper.
Can I make changes to my submission after I’ve submitted it?
Modifications to your submission are allowed until the submission deadline. After that, no changes can be made. Please make sure all details are correct before submitting.
What are the benefits of attending ICMC 2025 : The International Compact Modeling Conference?
Attending ICMC 2025 : The International Compact Modeling Conference provides an opportunity to present your research, network with peers and experts in your field, and gain feedback on your work. Additionally, it is an excellent platform for career advancement and collaboration opportunities.
What should I include in my abstract or proposal submission?
Your abstract or proposal should include a concise summary of your paper, including its purpose, methodology, and key findings. Ensure that it aligns with the conference themes.